机读格式显示(MARC)

• 000 00845cam 2200265 a 4500

• 001 0000500166

• 005 20050311165900.0

• 008 050311s1984 nyua b 000 0 engsu

• 010 __ |a 84015490

• 020 __ |a 0898381649

• 040 __ |a JHUL

• 050 00 |a TK7868 |b .L6E78

• 082 00 |a 621.381/73

• 090 __ |a TN47/B827

• 093 __ |a TN47 |2 4

• 100 1_ |a Brayton, Robert K.

• 245 10 |a Logic minimization algorithms for vlsi synthesis / |c by Robert K. Brayton...(et al.)

• 260 __ |a Boston : |b Kluwer Academic Publishers; |c 1984

• 300 __ |a ix, 1.9 p. : |b ill. ; |c 24 cm.

• 504 __ |a Includes bibliographical references.

• 650 _0 |a Logic design.

• 650 _0 |a Integrated circuits |y Very large scale integration.

• 650 _0 |a Integrated circuits |y Design and construction |y Data processing.

• 650 _0 |a Algorithms.

• 950 __ |a JHUL |b TN47 |c B827