机读格式显示(MARC)
- 000 01051cam a2200289 a 4500
- 008 070323r20072005cc a b 001 0 eng d
- 040 __ |a NPU |c NPU |d SCT
- 099 __ |a CAL 022007033327
- 245 10 |a CMOS pll synthesizers : |b analysis and design = CMOS锁相环 :分析和设计 / |c Keliu Shu, Edgar Sanchez-Sinencio.
- 246 31 |a CMOS锁相环 : |b 分析和设计
- 260 __ |a 北京 : |b 科学出版社, |c 2007.
- 300 __ |a xvi, 215 p. : |b ill. ; |c 24 cm.
- 504 __ |a Includes bibliographical references and index.
- 534 __ |p Reprint. Originally published: |c New York, N.Y. ; Springer, c2005. |z 0387236686. |z 9780387236681 (hardcover : alk. paper)
- 650 _0 |a Metal oxide semiconductors, Complementary.
- 650 _0 |a Phase-locked loops.
- 650 _0 |a Frequency synthesizers |x Design and construction.
- 700 1_ |a Sanchez-Sinencio, Edgar.
- 950 __ |a JHUL |b TN432 |c S562(C)